Computer Hardware Design - Classic papers


Title	Author	Cited by
First-order incremental block-based statistical timing analysis C Visweswariah, K Ravindran, K Kalafala… - IEEE Transactions on …, 2006	No profiles	792
Alternate loop-back diagnostic tests for wafer-level diagnosis of modern wireless transceivers using spectral signatures G Srinivasan, A Chatterjee… - VLSI Test Symposium …, 2006	No profiles	766
HotSpot: A compact thermal modeling methodology for early-stage VLSI design W Huang, S Ghosh, S Velusamy… - IEEE Transactions on …, 2006	Wei Huang	706
An analysis of efficient multi-core global power management policies: Maximizing performance for a given power budget C Isci, A Buyuktosunoglu, CY Cher, P Bose… - Proceedings of the …, 2006	Canturk Isci	605
Phase noise and jitter in CMOS ring oscillators AA Abidi - IEEE Journal of Solid-State Circuits, 2006	Asad Abidi	446
Modeling and minimization of PMOS NBTI effect for robust nanometer design R Vattikonda, W Wang, Y Cao - Proceedings of the 43rd annual …, 2006	Rakesh Vattikonda	433
A self-tuning DVS processor using delay-error detection and correction S Das, D Roberts, S Lee, S Pant, D Blaauw… - IEEE Journal of Solid …, 2006	Shidhartha Das	413
Design space exploration for 3D architectures Y Xie, GH Loh, B Black, K Bernstein - ACM Journal on Emerging …, 2006	Yuan Xie	371
A 3-GHz 70-Mb SRAM in 65-nm CMOS technology with integrated column-based dynamic power supply K Zhang, U Bhattacharya, Z Chen… - IEEE Journal of Solid …, 2006	No profiles	362
" It's a small world after all": NoC performance optimization via long-range link insertion UY Ogras, R Marculescu - IEEE Transactions on very large scale …, 2006	Umit Yusuf Ogras	356

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