| A configurable simulation environment for the efficient simulation of large-scale spiking neural networks on graphics processors JM Nageswaran, N Dutt, JL Krichmar, A Nicolau, AV Veidenbaum Neural networks 22 (5-6), 791-800, 2009 | 282 | 2009 |
| Round-trip engineering apparatus and methods for neural networks B Szatmary, EM Izhikevich, C Petre, JM Nageswaran, F Piekniewski US Patent 9,117,176, 2015 | 167 | 2015 |
| Apparatus and methods for temporally proximate object recognition FL Piekniewski, C Petre, SH Sokol, B Szatmary, JM Nageswaran, ... US Patent 9,122,994, 2015 | 166 | 2015 |
| Apparatus and methods for synaptic update in a pulse-coded network EM Izhikevich, F Piekniewski, JM Nageswaran, JA Levin, V Rangan, ... US Patent 9,147,156, 2015 | 157 | 2015 |
| High level neuromorphic network description apparatus and methods B Szatmary, EM Izhikevich, C Petre, JM Nageswaran, F Piekniewski US Patent 10,210,452, 2019 | 133 | 2019 |
| Efficient simulation of large-scale spiking neural networks using CUDA graphics processors JM Nageswaran, N Dutt, JL Krichmar, A Nicolau, A Veidenbaum 2009 International Joint Conference on Neural Networks, 2145-2152, 2009 | 132 | 2009 |
| Apparatus and method for partial evaluation of synaptic updates based on system events EM Izhikevich, F Piekniewski, JM Nageswaran US Patent 8,725,662, 2014 | 125 | 2014 |
| Elementary network description for neuromorphic systems with plurality of doublets wherein doublet events rules are executed in parallel EM Izhikevich, B Szatmary, C Petre, JM Nageswaran, F Piekniewski US Patent 9,104,973, 2015 | 112 | 2015 |
| Systems and methods for providing a neural network having an elementary network description for efficient implementation of event-triggered plasticity rules EM Izhikevich, B Szatmary, C Petre, F Piekniewski, JM Nageswaran US Patent 8,719,199, 2014 | 103 | 2014 |
| An efficient automated parameter tuning framework for spiking neural networks KD Carlson, JM Nageswaran, N Dutt, JL Krichmar Frontiers in neuroscience 8, 10, 2014 | 85 | 2014 |
| An efficient simulation environment for modeling large-scale cortical processing M Richert, JM Nageswaran, N Dutt, JL Krichmar Frontiers in neuroinformatics 5, 19, 2011 | 77 | 2011 |
| Systems and methods for automatic detection of spills D Fisher, C Griffin, M Richert, F Piekniewski, E Izhikevich, ... US Patent 9,987,752, 2018 | 58 | 2018 |
| Spiking neuron sensory processing apparatus and methods for saliency detection B Szatmary, M Richert, E Izhikevich, JM Nageswaran, F Piekniewski, ... US Patent 9,218,563, 2015 | 39 | 2015 |
| Computing spike-based convolutions on GPUs JM Nageswaran, N Dutt, Y Wang, T Delbrueck 2009 IEEE International Symposium on Circuits and Systems (ISCAS), 1917-1920, 2009 | 29 | 2009 |
| Towards reverse engineering the brain: Modeling abstractions and simulation frameworks JM Nageswaran, M Richert, N Dutt, JL Krichmar 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, 1-6, 2010 | 23 | 2010 |
| Data processing system and method for monitoring the cache coherence of processing units AS Terechko, JM Nageswaran US Patent App. 11/577,592, 2009 | 19 | 2009 |
| Cache-coherent heterogeneous multiprocessing as basis for streaming applications J van Eijndhoven, J Hoogerbrugge, MN Jayram, P Stravers, A Terechko Dynamic and robust streaming in and between connected consumer-electronic …, 2005 | 17 | 2005 |
| A complexity effective communication model for behavioral modeling of signal processing applications S Kiran, MN Jayram, P Rao, SK Nandy Proceedings of the 40th annual Design Automation Conference, 412-415, 2003 | 16 | 2003 |
| Apparatus and methods for event-triggered updates in parallel networks EM Izhikevich, B Szatmary, C Petre, F Piekniewski, JM Nageswaran US Patent 9,092,738, 2015 | 11 | 2015 |
| Accelerating brain circuit simulations of object recognition with cell processors A Felch, JM Nageswaran, A Chandrashekar, J Furlong, N Dutt, R Granger, ... Innovative architecture for future generation high-performance processors …, 2007 | 11 | 2007 |
