Marco Aurelio Cavalcanti Pacheco
Marco Aurelio Cavalcanti Pacheco
Professor do Departamento de Engenharia Elétrica da PUC-Rio, Pontifícia Universidade Católica do Rio de Janeiro
Dirección de correo verificada de ele.puc-rio.br
TítuloCitado porAño
Evolutionary electronics: automatic design of electronic circuits and systems by genetic algorithms
RS Zebulum, MA Pacheco, MMB Vellasco
CRC press, 2018
3332018
VLSI architectures for neural networks
P Treleaven, M Pacheco, M Vellasco
IEEE micro 9 (6), 8-27, 1989
1241989
Well placement optimization using a genetic algorithm with nonlinear constraints
AA Emerick, E Silva, B Messer, LF Almeida, D Szwarcman, MAC Pacheco, ...
SPE reservoir simulation symposium, 2009
1212009
Algoritmos genéticos: princípios e aplicações
MAC Pacheco
ICA: Laboratório de Inteligência Computacional Aplicada. Departamento de …, 1999
1131999
Inverted hierarchical neuro-fuzzy BSP system: a novel neuro-fuzzy model for pattern classification and rule extraction in databases
LB Gonçalves, MMBR Vellasco, MAC Pacheco, FJ de Souza
IEEE Transactions on Systems, Man, and Cybernetics, Part C (Applications and …, 2006
1102006
Quantum-inspired evolutionary algorithm for numerical optimization
AVA da Cruz, MMBR Vellasco, MAC Pacheco
Hybrid evolutionary algorithms, 19-37, 2007
852007
Data Mining Techniques on the Evaluation of Wireless Churn.
J Ferreira, MMBR Vellasco, MAC Pacheco, R Carlos, H Barbosa
ESANN 28, 483-488, 2004
802004
Hierarchical neuro-fuzzy quadtree models
FJ de Souza, MMR Vellasco, MAC Pacheco
Fuzzy sets and systems 130 (2), 189-205, 2002
732002
Comparison of different evolutionary methodologies applied to electronic filter design
RS Zebulum, MA Pacheco, M Vellasco
1998 IEEE International Conference on Evolutionary Computation Proceedings …, 1998
661998
Evolvable systems in hardware design: Taxonomy, survey and applications
RS Zebulum, MA Pacheco, M Vellasco
International Conference on Evolvable Systems, 344-358, 1996
601996
Analog circuits evolution in extrinsic and intrinsic modes
RS Zebulum, MA Pacheco, M Vellasco
International Conference on Evolvable Systems, 154-165, 1998
541998
A multi-objective optimisation methodology applied to the synthesis of low-power operational amplifiers
RS Zebulum, MA Pacheco, M Vellasco
In Ivan Jorge Cheuri and Carlos Alberto dos Reis Filho, editors, Proceedings …, 1998
491998
Electric load forecasting: evaluating the novel hierarchical neuro-fuzzy BSP model
MMBR Vellasco, MAC Pacheco, LSR Neto, FJ de Souza
International journal of electrical power & energy systems 26 (2), 131-142, 2004
482004
Artificial evolution of active filters: a case study
RS Zebulum, MA Pacheco, M Vellasco
Proceedings of the First NASA/DoD Workshop on Evolvable Hardware, 66-75, 1999
481999
Mobile robot path planning using genetic algorithms
CE Thomaz, MAC Pacheco, MMBR Vellasco
International Work-Conference on Artificial Neural Networks, 671-679, 1999
451999
A theoretical and experimental study of positive and neutral LiF clusters produced by fast ion impact on a polycrystalline LiF target
FA Fernandez-Lima, OP VilelaNeto, AS Pimentel, CR Ponciano, ...
The Journal of Physical Chemistry A 113 (9), 1813-1821, 2009
44*2009
Variable length representation in evolutionary electronics
RS Zebulum, M Vellasco, MA Pacheco
Evolutionary Computation 8 (1), 93-120, 2000
412000
A reconfigurable platform for the automatic synthesis of analog circuits
R Zebulum, H Sinohara, M Vellasco, C Santini, M Pacheco, M Szwarcman
Proceedings. The Second NASA/DoD Workshop on Evolvable Hardware, 91-98, 2000
382000
Synthesis of CMOS operational amplifiers through genetic algorithms
RS Zebulum, MA Pacheco, M Vellasco
Proceedings. XI Brazilian Symposium on Integrated Circuit Design (Cat. No …, 1998
371998
Neural network simulation and evolutionary synthesis of QCA circuits
OPV Neto, MAC Pacheco, CRH Barbosa
IEEE Transactions on Computers 56 (2), 191-201, 2007
322007
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Artículos 1–20