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George C. Caragea
George C. Caragea
Senior Software Engineer, Amazon Web Services
Verified email at amazon.com
Title
Cited by
Cited by
Year
Orca: a modular query optimizer architecture for big data
MA Soliman, L Antova, V Raghavan, A El-Helw, Z Gu, E Shen, ...
Proceedings of the 2014 ACM SIGMOD international conference on Management of …, 2014
1192014
Precisely tracking memory usage in multi-process computing environment
MF Rahman, GC Caragea, C Garcia-Alvarado, M Petropoulos
US Patent 10,037,144, 2018
1022018
Lazy binary-splitting: a run-time adaptive work-stealing scheduler
A Tzannes, GC Caragea, R Barua, U Vishkin
ACM Sigplan Notices 45 (5), 179-190, 2010
862010
Lazy scheduling: A runtime adaptive scheduler for declarative parallelism
A Tzannes, GC Caragea, U Vishkin, R Barua
ACM Transactions on Programming Languages and Systems (TOPLAS) 36 (3), 1-51, 2014
392014
General-purpose vs. GPU: Comparison of many-cores on irregular workloads
GC Caragea, F Keceli, A Tzannes, U Vishkin
Proc. HotPar, 2010
382010
Models for advancing PRAM and other algorithms into parallel programs for a PRAM-On-Chip platform
U Vishkin, GC Caragea, B Lee
UMIACS, 2006
342006
Brief announcement: better speedups for parallel max-flow
GC Caragea, U Vishkin
Proceedings of the twenty-third annual ACM symposium on Parallelism in …, 2011
232011
Toolchain for programming, simulating and studying the XMT many-core architecture
F Keceli, A Tzannes, GC Caragea, R Barua, U Vishkin
2011 IEEE International Symposium on Parallel and Distributed Processing …, 2011
232011
Auto-WLM: Machine learning enhanced workload management in Amazon Redshift
G Saxena, M Rahman, N Chainani, C Lin, G Caragea, F Chowdhury, ...
Companion of the 2023 International Conference on Management of Data, 225-237, 2023
212023
Resource-aware compiler prefetching for many-cores
GC Caragea, A Tzannes, F Keceli, R Barua, U Vishkin
2010 Ninth International Symposium on Parallel and Distributed Computing …, 2010
202010
Brief announcement: performance potential of an easy-to-program PRAM-on-chip prototype versus state-of-the-art processor
GC Caragea, AB Saybasili, X Wen, U Vishkin
Proceedings of the twenty-first annual symposium on Parallelism in …, 2009
192009
Using computing resources to perform database queries according to a dynamically determined query size
G Saxena, GC Caragea, NK Chainani, M Grund
US Patent 10,922,316, 2021
142021
Optimization of common table expressions in mpp database systems
A El-Helw, V Raghavan, MA Soliman, G Caragea, Z Gu, M Petropoulos
Proceedings of the VLDB Endowment 8 (12), 1704-1715, 2015
122015
Programming for high schools
U Vishkin, R Tzur, D Ellison, GC Caragea
Keynote, The CS4HS Workshop. Download from http://www. umiacs. umd. edu …, 2009
52009
Deriving cardinality values from approximate quantile summaries
GC Caragea, AE Caldwell, AW Gupta, M Petropoulos
US Patent 10,776,368, 2020
42020
Query plan generation for queries having common expressions
ELH Amr, V Raghavan, MF Soliman, GC Caragea, M Petropoulos
US Patent 9,501,536, 2016
42016
Precisely tracking memory usage in multi-process computing environment
MF Rahman, GC Caragea, C Garcia-Alvarado, M Petropoulos
US Patent 10,558,365, 2020
32020
Issues in writing a parallel compiler starting from a serial compiler
A Tzannes, R Barua, G Caragea, U Vishkin
draft. Technical report, 2006
32006
Dynamic concurrency level management for database queries
MR Rahman, GC Caragea, RN Sett, G Saxena, N Chainani, C Lin
US Patent 11,762,860, 2023
22023
Dynamic compilation of machine learning models based on hardware configurations
B Narayanaswamy, G Soundararajan, J Chen, Y Papakonstantinou, ...
US Patent 11,657,069, 2023
22023
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