| A system-level simulator for RRAM-based neuromorphic computing chips MKF Lee, Y Cui, T Somu, T Luo, J Zhou, WT Tang, WF Wong, RSM Goh ACM Transactions on Architecture and Code Optimization (TACO) 15 (4), 1-24, 2019 | 63 | 2019 |
| Cost-efficient acceleration of hardware Trojan detection through fan-out cone analysis and weighted random pattern technique B Zhou, W Zhang, S Thambipillai, JTK Jin, V Chaturvedi, T Luo IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015 | 62 | 2015 |
| An FPGA-based hardware emulator for neuromorphic chip with RRAM T Luo, X Wang, C Qu, MKF Lee, WT Tang, WF Wong, RSM Goh IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 35 | 2018 |
| Efficient spiking neural networks with radix encoding Z Wang, X Gu, RSM Goh, JT Zhou, T Luo IEEE Transactions on Neural Networks and Learning Systems 35 (3), 3689-3701, 2022 | 22 | 2022 |
| Evolutionary multi-objective model compression for deep neural networks Z Wang, T Luo, M Li, JT Zhou, RSM Goh, L Zhen IEEE Computational Intelligence Magazine 16 (3), 10-21, 2021 | 20 | 2021 |
| E3NE: An end-to-end framework for accelerating spiking neural networks with emerging neural encoding on FPGAs D Gerlinghoff, Z Wang, X Gu, RSM Goh, T Luo IEEE Transactions on Parallel and Distributed Systems 33 (11), 3207-3219, 2021 | 19 | 2021 |
| 0.5 V 4.8 pJ/SOP 0.93\mu\mathrm {W} $ Leakage/core Neuromorphic Processor with Asynchronous NoC and Reconfigurable LIF Neuron VP Nambiar, J Pu, YK Lee, A Mani, T Luo, L Yang, EK Koh, MM Wong, ... 2020 IEEE Asian Solid-State Circuits Conference (A-SSCC), 1-4, 2020 | 17 | 2020 |
| A racetrack memory based in-memory booth multiplier for cryptography application T Luo, W Zhang, B He, D Maskell 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), 286-291, 2016 | 17 | 2016 |
| Winograd convolution: A perspective from fault tolerance X Xue, H Huang, C Liu, T Luo, L Zhang, Y Wang Proceedings of the 59th ACM/IEEE Design Automation Conference, 853-858, 2022 | 15 | 2022 |
| DeepFire: Acceleration of convolutional spiking neural network on modern field programmable gate arrays MTL Aung, C Qu, L Yang, T Luo, RSM Goh, WF Wong 2021 31st International Conference on Field-Programmable Logic and …, 2021 | 15 | 2021 |
| Benchmarking quantum (-inspired) annealing hardware on practical use cases T Huang, J Xu, T Luo, X Gu, R Goh, WF Wong IEEE Transactions on Computers 72 (6), 1692-1705, 2022 | 13 | 2022 |
| Achieving green ai with energy-efficient deep learning using neuromorphic computing T Luo, WF Wong, RSM Goh, AT Do, Z Chen, H Li, W Jiang, W Yau Communications of the ACM 66 (7), 52-57, 2023 | 11 | 2023 |
| EDCompress: Energy-aware model compression for dataflows Z Wang, T Luo, RSM Goh, JT Zhou IEEE Transactions on Neural Networks and Learning Systems 35 (1), 208-220, 2022 | 11 | 2022 |
| NC-Net: Efficient Neuromorphic Computing Using Aggregated Subnets on a Crossbar-Based Architecture With Nonvolatile Memory T Luo, L Yang, H Zhang, C Qu, X Wang, Y Cui, WF Wong, RSM Goh IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 10 | 2021 |
| Coreset: Hierarchical neuromorphic computing supporting large-scale neural networks with improved resource efficiency L Yang, H Zhang, T Luo, C Qu, MTL Aung, Y Cui, J Zhou, MM Wong, J Pu, ... Neurocomputing 474, 128-140, 2022 | 9 | 2022 |
| A novel two-stage modular multiplier based on racetrack memory for asymmetric cryptography T Luo, B He, W Zhang, DL Maskell 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 276-282, 2017 | 9 | 2017 |
| Rct: Resource constrained training for edge ai T Huang, T Luo, M Yan, JT Zhou, R Goh IEEE Transactions on Neural Networks and Learning Systems 35 (2), 2575-2587, 2022 | 8 | 2022 |
| A hybrid logic block architecture in FPGA for holistic efficiency T Luo, H Liang, W Zhang, B He, D Maskell IEEE Transactions on Circuits and Systems II: Express Briefs 64 (1), 71-75, 2016 | 8 | 2016 |
| Evolutionary architecture search for generative adversarial networks based on weight sharing Y Xue, W Tong, F Neri, P Chen, T Luo, L Zhen, X Wang IEEE Transactions on Evolutionary Computation, 2023 | 7 | 2023 |
| Exploring Winograd convolution for cost-effective neural network fault tolerance X Xue, C Liu, B Liu, H Huang, Y Wang, T Luo, L Zhang, H Li, X Li IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023 | 7 | 2023 |
