Enhancement of memory window in short channel non-volatile memory devices using double layer tungsten nanocrystals SK Samanta, PK Singh, WJ Yoo, G Samudra, YC Yeo, LK Bera, ...
IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest …, 2005
63 2005 Metal nanocrystal memory with pt single-and dual-layer NC With low-Leakage AI2O3 Blocking Dielectric PK Singh, G Bisht, R Hofmann, K Singh, N Krishna, S Mahapatra
Electron Device Letters 29, 1389 -1391, 2008
41 * 2008 Nitride engineering and the effect of interfaces on charge trap flash performance and reliability C Sandhya, U Ganguly, KK Singh, PK Singh, C Olsen, SM Seutter, ...
2008 IEEE International Reliability Physics Symposium, 406-411, 2008
24 2008 Partial Crystallization of for Two-Bit/Four-Level SONOS-Type Flash Memory G Zhang, SK Samanta, PK Singh, FJ Ma, MT Yoo, Y Roh, WJ Yoo
IEEE Transactions on Electron Devices 54 (12), 3177-3185, 2007
20 2007 Performance and reliability study of single-layer and dual-layer platinum nanocrystal flash memory devices under NAND operation PK Singh, G Bisht, K Auluck, M Sivatheja, R Hofmann, KK Singh, ...
IEEE Transactions on Electron Devices 57 (8), 1829-1837, 2010
18 2010 Long retention and low voltage operation using IrO/sub 2/HfAlO/HfSiO/HfalO gate stack for memory application YQ Wang, PK Singh, WJ Yoo, YC Yeo, G Samudra, A Chin, WS Hwang, ...
IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest …, 2005
16 2005 Performance and reliability of Au and Pt single-layer metal nanocrystal flash memory under NAND (FN/FN) operation PK Singh, R Hofmann, KK Singh, N Krishna, S Mahapatra
IEEE Transactions on Electron Devices 56 (9), 2065-2072, 2009
15 2009 Localized charge trapping and lateral charge diffusion in metal nanocrystal-embedded High-κ/SiO2 gate stack ZZ Lwin, KL Pey, C Liu, Q Liu, Q Zhang, YN Chen, PK Singh, S Mahapatra
Applied Physics Letters 99 (22), 222102, 2011
12 2011 Development of a 3D simulator for metal nanocrystal (NC) flash memories under NAND operation A Nainani, S Palit, PK Singh, U Ganguly, N Krishna, J Vasi, S Mahapatra
2007 IEEE International Electron Devices Meeting, 947-950, 2007
12 2007 Tri-Level Resistive Switching in Metal-Nanocrystal-Based Gate Stack YN Chen, KL Pey, KEJ Goh, ZZ Lwin, PK Singh, S Mahapatra
IEEE Transactions on Electron Devices 57 (11), 3001-3005, 2010
10 2010 Reliability of single and dual layer Pt nanocrystal devices for NAND flash applications: A 2-region model for endurance defect generation PK Singh, G Bisht, M Sivatheja, C Sandhya, G Mukhopadhyay, ...
2009 IEEE International Reliability Physics Symposium, 301-306, 2009
10 2009 Au nanocrystal flash memory reliability and failure analysis PK Singh, KK Singh, R Hofmann, K Armstrong, N Krishna, S Mahapatra
2008 15th International Symposium on the Physical and Failure Analysis of …, 2008
9 2008 Dual layer Pt metal nanocrystal flash for multi-level-cell NAND application PK Singh, G Bisht, R Hofmann, K Singh, S Mahapatra
2009 IEEE International Memory Workshop, 1-4, 2009
7 2009 40nm & 22nm Embedded Charge Trap Flash for Automotive Applications J Pak, C Chen, KT Chang, S Shetty, A Tu, J Neo, P Singh, S Amato, ...
2018 IEEE International Memory Workshop (IMW), 1-4, 2018
6 2018 Charging and discharging characteristics of metal nanocrystals in degraded dielectric stacks ZZ Lwin, KL Pey, YN Chen, PK Singh, S Mahapatra
2010 IEEE International Reliability Physics Symposium, 89-93, 2010
6 2010 Suppression of program disturb with bit line and select gate voltage regulation C Chen, KT Chang, Y Betser, S Shetty, G Mazzeo, TW Neo, P Singh
US Patent 10,685,724, 2020
4 2020 Temperature-dependent relaxation current on single and dual layer Pt metal nanocrystal-based Al2O3/SiO2 gate stack YN Chen, KEJ Goh, X Wu, ZZ Lwin, PK Singh, S Mahapatra, KL Pey
Journal of Applied Physics 112 (10), 104503-104503-6, 2012
4 2012 Method of reducing charge loss in non-volatile memories PK Singh, S Shetty, J Pak
US Patent 10,068,912, 2018
3 2018 Suppression of program disturb with bit line and select gate voltage regulation
US Patent 9,881,683, 2018
3 * 2018 Recent advances in charge trap flash memories C Sandhya, PK Singh, S Gupta, H Rohra, M Shivatheja, U Ganguly, ...
Electron Devices and Semiconductor Technology, 2009. IEDST'09. 2nd …, 2009
3 2009