| SISSA: The lpGBT PLL and CDR Architecture, Performance and SEE Robustness S Biereigel, P Moreira, S Kulis, R Francisco, PV Leitao, P Leroux, ... PoS, 034, 2020 | 19 | 2020 |
| A systematic design methodology for optimization of sigma-delta modulators based on an evolutionary algorithm JLA de Melo, N Pereira, PV Leitão, N Paulino, J Goes IEEE Transactions on Circuits and Systems I: Regular Papers 66 (9), 3544-3556, 2019 | 7 | 2019 |
| Robust optimization-based high frequency Gm-C filter design PMV Leitão, H Fino Technological Innovation for Value Creation: Third IFIP WG 5.5/SOCOLNET …, 2012 | 2 | 2012 |
| A simple class-D audio power amplifier using a passive CT ΣΔ modulator for medium quality sound systems JLA de Melo, PV Leitão, J Goes, N Paulino 2015 22nd International Conference Mixed Design of Integrated Circuits …, 2015 | 1 | 2015 |
| The eCDR-PLL, a radiation-tolerant ASIC for clock and data recovery and deterministic phase clock synthesis P Leitao, R Francisco, X Llopart, F Tavernier, S Baron, S Bonacini, ... Journal of Instrumentation 10 (03), C03024, 2015 | 1 | 2015 |
| Design of a Fully Differential Power Output Stage for a Class D Audio Amplifier Using a Single-Ended Power Supply PV Leitão, JLA de Melo, N Paulino Technological Innovation for the Internet of Things: 4th IFIP WG 5.5 …, 2013 | | 2013 |
