Arun V. Thathachary

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Suman DattaJoseph M. Pettit Chair ProfessorDirección de correo verificada de gatech.edu
Ashish AgrawalDevcie Engineer at Components Research, Intel CorporationDirección de correo verificada de intel.com
Roman Engel-HerbertDirektor, Paul-Drude-Institut für Festkörperelektronik, Leibniz Institut im Foschungsverbund BerlinDirección de correo verificada de pdi-berlin.de
Nidhi AgrawalPrincipal Engineer - Western DigitalDirección de correo verificada de wdc.com
Nikhil ShuklaUniversity of VirginiaDirección de correo verificada de virginia.edu
Darrell G. SchlomCornell UniversityDirección de correo verificada de cornell.edu
Sumeet GuptaSchool of Electrical and Computer Engineering, Purdue UniversityDirección de correo verificada de purdue.edu
Lu LiuIntel CorporationDirección de correo verificada de intel.com
Mirco CantoroSamsung ElectronicsDirección de correo verificada de samsung.com
Krishna K. BhuwalkaBelgium Research Center, HuaweiDirección de correo verificada de huawei.com
Navakanta BhatIndian Institute of ScienceDirección de correo verificada de ece.iisc.ernet.in
Souvik MahapatraProfessor, EE Dept, IIT Bombay (Fellow of IEEE, INSA, IASc, INAE)Dirección de correo verificada de ee.iitb.ac.in

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Arun V. Thathachary

PhD., Device Engineer, Intel Corp.

Dirección de correo verificada de intel.com

Microelectronics Semiconductor device physics and circuits


Título Ordenar por citas Ordenar por año Ordenar por título	Citado por Citado por	Año
A steep-slope transistor based on abrupt electronic phase transition N Shukla, AV Thathachary, A Agrawal, H Paik, A Aziz, DG Schlom, ... Nature communications 6 (1), 7812, 2015	378	2015
Fermi level depinning at the germanium Schottky interface through sulfur passivation AV Thathachary, KN Bhat, N Bhat, MS Hegde Applied Physics Letters 96 (15), 2010	81	2010
Electron Transport in Multigate In_xGa_1–x As Nanowire FETs: From Diffusive to Ballistic Regimes at Room Temperature AV Thathachary, N Agrawal, L Liu, S Datta Nano letters 14 (2), 626-633, 2014	39	2014
Impact of Sidewall Passivation and Channel Composition on In_xGa_1-xAs FinFET Performance AV Thathachary, G Lavallee, M Cantoro, KK Bhuwalka, YC Heo, S Maeda, ... IEEE Electron Device Letters 36 (2), 117-119, 2014	24	2014
Enhancement mode strained (1.3%) germanium quantum well FinFET (W Fin= 20nm) with high mobility (μ Hole= 700 cm 2/Vs), low EOT (∼ 0.7 nm) on bulk silicon substrate SD A. Agrawal, M Barth, GB Rayner, Arun V T, C Eichfeld, G Lavallee, S-Y Yu ... Electron Devices Meeting (IEDM), 2014 IEEE International, 16.4. 1-16.4. 4, 2014	20*	2014
Impact of Varying Indium(x) Concentration and Quantum Confinement on PBTI Reliability in In_xGa_1-xAs FinFET N Agrawal, AV Thathachary, S Mahapatra, S Datta IEEE Electron Device Letters 36 (2), 120-122, 2014	17	2014
Indium arsenide (InAs) single and dual quantum-well heterostructure FinFETs AV Thathachary, N Agrawal, KK Bhuwalka, M Cantoro, YC Heo, ... 2015 Symposium on VLSI Technology (VLSI Technology), T208-T209, 2015	16	2015
A steep-slope transistor based on abrupt electronic phase transition Nat N Shukla, AV Thathachary, A Agrawal, H Paik, A Aziz, DG Schlom, ... Commun 6, 7812, 2015	16	2015
Investigation of In_xGa_1−xAs FinFET architecture with varying indium (x) concentration and quantum confinement VT Arun, N Agrawal, G Lavallee, M Cantoro, SS Kim, DW Kim, S Datta 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical …, 2014	11	2014
Impact of fin width scaling on carrier transport in III-V FinFETs AV Thathachary, L Liu, S Datta 71st Device Research Conference, 17-18, 2013	9	2013
(Keynote) III-V Compound Semiconductor Field Effect Transistors for Low Power Digital Logic S Datta, AV Thathachary, L Liu, E Hwang, A Agrawal, N Agrawal ECS Transactions 53 (3), 3, 2013	4	2013
Physics, fabrication and characterization of III-V multi-gate FETs for low power electronics AV Thathachary The Pennsylvania State University, 2015	2	2015

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