Seguir
Alireza Yazdanpanah
Alireza Yazdanpanah
Ph.D. in Computer Architecture Engineering, University of Tehran
Dirección de correo verificada de ut.ac.ir
Título
Citado por
Citado por
Año
A new compression ratio prediction algorithm for hardware implementations of LZW data compression
A Yazdanpanah, MR Hashemi
2010 15th CSI International Symposium on Computer Architecture and Digital …, 2010
222010
A simple lossless preprocessing algorithm for hardware implementation of Deflate data compression
A Yazdanpanah, MR Hashemi
2011 19th Iranian Conference on Electrical Engineering, 1-5, 2011
112011
Surenaiv: Towards a cost-effective full-size humanoid robot for real-world scenarios
A Yousefi-Koma, B Maleki, H Maleki, A Amani, MA Bazrafshani, ...
2020 IEEE-RAS 20th International Conference on Humanoid Robots (Humanoids …, 2021
82021
Generating test patterns for sequential circuits using random patterns by PLI functions
MH Haghbayan, A Yazdanpanah, S Karamati, R Saeedi, Z Navabi
2010 East-West Design & Test Symposium (EWDTS), 456-461, 2010
42010
EREER: Energy-aware register file and execution unit using exploiting redundancy in GPGPUs
A Yazdanpanah, S Sajadimanesh, S Safari
Microprocessors and Microsystems 77, 103176, 2020
32020
Lagrange multiplier selection for video coding with varying quantization
A Aminlou, A Yazdanpanah, MR Hashemi
2011 24th Canadian Conference on Electrical and Computer Engineering (CCECE …, 2011
2011
El sistema no puede realizar la operación en estos momentos. Inténtalo de nuevo más tarde.
Artículos 1–6