| High-performance CNN accelerator on FPGA using unified winograd-GEMM architecture S Kala, BR Jose, J Mathew, S Nalesh IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (12 …, 2019 | 94 | 2019 |
| A hardware architecture for radial basis function neural network classifier M Mohammadi, A Krishna, S Nalesh, SK Nandy IEEE Transactions on Parallel and Distributed Systems 29 (3), 481-495, 2017 | 33 | 2017 |
| Efficient cnn accelerator on fpga S Kala, S Nalesh IETE Journal of Research 66 (6), 733-740, 2020 | 25 | 2020 |
| UniWiG: Unified winograd-GEMM architecture for accelerating CNN on FPGAs S Kala, J Mathew, BR Jose, S Nalesh 2019 32nd International Conference on VLSI Design and 2019 18th …, 2019 | 25 | 2019 |
| Compiling HPC kernels for the REDEFINE CGRA KT Madhu, S Das, S Nalesh, SK Nandy, R Narayan 2015 IEEE 17th International Conference on High Performance Computing and …, 2015 | 21 | 2015 |
| A framework for post-silicon realization of arbitrary instruction extensions on reconfigurable data-paths S Das, K Madhu, M Krishna, N Sivanandan, F Merchant, S Natarajan, ... Journal of Systems Architecture 60 (7), 592-614, 2014 | 21 | 2014 |
| High throughput, low latency, memory optimized 64K point FFT architecture using novel radix-4 butterfly unit S Kala, S Nalesh, A Maity, SK Nandy, R Narayan 2013 IEEE International Symposium on Circuits and Systems (ISCAS), 3034-3037, 2013 | 18 | 2013 |
| Micro-architectural enhancements in distributed memory cgras for lu and qr factorizations F Merchant, A Maity, M Mahadurkar, K Vatwani, I Munje, M Krishna, ... 2015 28th International Conference on VLSI Design, 153-158, 2015 | 16 | 2015 |
| Design of a low power 64 point FFT architecture for WLAN applications S Kala, S Nalesh, SK Nandy, R Narayan 2013 25th International conference on Microelectronics (ICM), 1-4, 2013 | 16 | 2013 |
| Rhyme: Redefine hyper cell multicore for accelerating hpc kernels S Das, N Sivanandan, KT Madhu, SK Nandy, R Narayan 2016 29th International Conference on VLSI Design and 2016 15th …, 2016 | 11 | 2016 |
| Synthesis of instruction extensions on hypercell, a reconfigurable datapath KT Madhu, S Das, CM Krishna, S Nalesh, SK Nandy, R Narayan 2014 International Conference on Embedded Computer Systems: Architectures …, 2014 | 11 | 2014 |
| Performance analysis of convolutional neural network models S Kala, D Paul, BR Jose, J Mathew, S Nalesh 2019 9th International Conference on Advances in Computing and Communication …, 2019 | 9 | 2019 |
| Energy efficient, scalable, and dynamically reconfigurable FFT architecture for OFDM systems S Kala, S Nalesh, SK Nandy, R Narayan 2014 Fifth International Symposium on Electronic System Design, 20-24, 2014 | 9 | 2014 |
| SIMAAH: RTL simulation accelerator for complex SoC's IB Mahapatra, S Natarajan, S Nalesh, SK Nandy 2015 IEEE International Conference on Electronics, Computing and …, 2015 | 6 | 2015 |
| Bandwidth-efficient sparse matrix multiplier architecture for deep neural networks on fpga M Mahesh, S Nalesh, S Kala 2021 IEEE 34th International System-on-Chip Conference (SOCC), 7-12, 2021 | 5 | 2021 |
| Radix-43 based two-dimensional FFT architecture with efficient data reordering scheme. S Kala, J Mathew, BR Jose, N Sivanandan IET Comput. Digit. Tech. 13 (2), 78-86, 2019 | 5 | 2019 |
| Energy aware synthesis of application kernels expressed in functional languages on a coarse grained composable reconfigurable array S Nalesh, KT Madhu, S Das, SK Nandy, R Narayan 2015 IEEE International Symposium on Nanoelectronic and Information Systems …, 2015 | 4 | 2015 |
| Efficient Hardware Acceleration of Convolutional Neural Networks S Kala, BR Jose, J Mathew, S Nalesh 2019 32nd IEEE International System-on-Chip Conference (SOCC), 191-192, 2019 | 3 | 2019 |
| Image reconstruction using novel two-dimensional fourier transform S Kala, S Nalesh, BR Jose, J Mathew Advances in Soft Computing and Machine Learning in Image Processing, 699-718, 2017 | 3 | 2017 |
| MOSCON: Modified Outer Product based Sparse Matrix-Matrix Multiplication Accelerator with Configurable Tiles G Noble, S Nalesh, S Kala 2023 36th International Conference on VLSI Design and 2023 22nd …, 2023 | 2 | 2023 |
