| Phase change memory technology GW Burr, MJ Breitwisch, M Franceschini, D Garetto, K Gopalakrishnan, ... Journal of Vacuum Science & Technology B 28 (2), 223-262, 2010 | 1231 | 2010 |
| Overview of candidate device technologies for storage-class memory GW Burr, BN Kurdi, JC Scott, CH Lam, K Gopalakrishnan, RS Shenoy IBM Journal of Research and Development 52 (4.5), 449-464, 2008 | 1124 | 2008 |
| Experimental demonstration and tolerancing of a large-scale neural network (165 000 synapses) using phase-change memory as the synaptic weight element GW Burr, RM Shelby, S Sidler, C Di Nolfo, J Jang, I Boybat, RS Shenoy, ... IEEE Transactions on Electron Devices 62 (11), 3498-3507, 2015 | 1074 | 2015 |
| Access devices for 3D crosspoint memory GW Burr, RS Shenoy, K Virwani, P Narayanan, A Padilla, B Kurdi, ... Journal of Vacuum Science & Technology B 32 (4), 2014 | 405 | 2014 |
| Electrical Integrity of MOS Devices in Laser Annealed 3D IC Structures B Rajendran, RS Shenoy, MO Thompson, RFW Pease proceedings VLSI Multi Level Interconnect Conference, 73-74, 2004 | 216 | 2004 |
| CMOS transistor processing compatible with monolithic 3-D Integration B Rajendran, RS Shenoy, DJ Witte, NS Chokshi, RL DeLeon, GS Tompa, ... 22nd International VLSI Multilevel Interconnection Conference, VMIC 2005, 2005 | 215 | 2005 |
| Nanoscale electronic synapses using phase change devices BL Jackson, B Rajendran, GS Corrado, M Breitwisch, GW Burr, R Cheek, ... ACM Journal on Emerging Technologies in Computing Systems (JETC) 9 (2), 1-20, 2013 | 190 | 2013 |
| Highly-scalable novel access device based on mixed ionic electronic conduction (MIEC) materials for high density phase change memory (PCM) arrays K Gopalakrishnan, RS Shenoy, CT Rettner, K Virwani, DS Bethune, ... 2010 Symposium on VLSI Technology, 205-206, 2010 | 162 | 2010 |
| Optimization of extrinsic source/drain resistance in ultrathin body double-gate FETs RS Shenoy, KC Saraswat IEEE transactions on nanotechnology 2 (4), 265-270, 2003 | 89 | 2003 |
| Electronic learning synapse with spike-timing dependent plasticity using unipolar memory-switching elements DS Modha, RS Shenoy US Patent 8,250,010, 2012 | 86 | 2012 |
| Large-scale (512kbit) integration of multilayer-ready access-devices based on mixed-ionic-electronic-conduction (MIEC) at 100% yield GW Burr, K Virwani, RS Shenoy, A Padilla, M BrightSky, EA Joseph, ... 2012 Symposium on VLSI Technology (VLSIT), 41-42, 2012 | 82 | 2012 |
| MIEC (mixed-ionic-electronic-conduction)-based access devices for non-volatile crossbar memory arrays RS Shenoy, GW Burr, K Virwani, B Jackson, A Padilla, P Narayanan, ... Semiconductor Science and Technology 29 (10), 104005, 2014 | 75 | 2014 |
| Low thermal budget processing for sequential 3-D IC fabrication B Rajendran, RS Shenoy, DJ Witte, NS Chokshi, RL DeLeon, GS Tompa, ... IEEE Transactions on Electron Devices 54 (4), 707-714, 2007 | 75 | 2007 |
| Voltage polarity effects in Ge2Sb2Te5-based phase change memory devices A Padilla, GW Burr, CT Rettner, T Topuria, PM Rice, B Jackson, K Virwani, ... Journal of Applied Physics 110 (5), 2011 | 72 | 2011 |
| Sub-30nm scaling and high-speed operation of fully-confined access-devices for 3D crosspoint memory based on mixed-ionic-electronic-conduction (MIEC) materials K Virwani, GW Burr, RS Shenoy, CT Rettner, A Padilla, T Topuria, ... 2012 International Electron Devices Meeting, 2.7. 1-2.7. 4, 2012 | 70 | 2012 |
| Endurance and scaling trends of novel access-devices for multi-layer crosspoint-memory based on mixed-ionic-electronic-conduction (MIEC) materials RS Shenoy, K Gopalakrishnan, B Jackson, K Virwani, GW Burr, ... 2011 Symposium on VLSI Technology-Digest of Technical Papers, 94-95, 2011 | 41 | 2011 |
| 30.2 A 1Tb 4b/Cell 144-Tier Floating-Gate 3D-NAND Flash Memory with 40MB/s Program Throughput and 13.8Gb/mm2 Bit Density A Khakifirooz, S Balasubrahmanyam, R Fastow, KH Gaewsky, CW Ha, ... 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 424-426, 2021 | 38 | 2021 |
| Exploring the design space for crossbar arrays built with mixed-ionic-electronic-conduction (MIEC) access devices P Narayanan, GW Burr, RS Shenoy, S Stephens, K Virwani, A Padilla, ... IEEE Journal of the Electron Devices Society 3 (5), 423-434, 2015 | 32 | 2015 |
| Voltage polarity effects in GST-based phase change memory: Physical origins and implications A Padilla, GW Burr, K Virwani, A Debunne, CT Rettner, T Topuria, ... 2010 International Electron Devices Meeting, 29.4. 1-29.4. 4, 2010 | 29 | 2010 |
| Electronic learning synapse with spike-timing dependent plasticity using memory-switching elements DS Modha, RS Shenoy US Patent 8,682,822, 2014 | 27 | 2014 |
