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Raghu Prabhakar
Raghu Prabhakar
SambaNova Systems
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Plasticine: A reconfigurable architecture for parallel paterns
R Prabhakar, Y Zhang, D Koeplinger, M Feldman, T Zhao, S Hadjis, ...
ACM SIGARCH Computer Architecture News 45 (2), 389-402, 2017
3012017
Spatial: A language and compiler for application accelerators
D Koeplinger, M Feldman, R Prabhakar, Y Zhang, S Hadjis, R Fiszel, ...
Proceedings of the 39th ACM SIGPLAN Conference on Programming Language …, 2018
2462018
Automatic Generation of Efficient Accelerators for Reconfigurable Hardware
D Koeplinger, R Prabhakar, C Delimitrou, Y Zhang, C Kozyrakis, ...
146*
Generating configurable hardware from parallel patterns
R Prabhakar, D Koeplinger, KJ Brown, HJ Lee, C De Sa, C Kozyrakis, ...
Acm Sigplan Notices 51 (4), 651-665, 2016
1012016
Static and dynamic co-optimizations for blocks mapping in hybrid caches
YT Chen, J Cong, H Huang, C Liu, R Prabhakar, G Reinman
Proceedings of the 2012 ACM/IEEE international symposium on Low power …, 2012
542012
Configuration load of a reconfigurable data processor
MK Shah, R Sivaramakrishnan, M Luttrell, DB Jackson, R Prabhakar, ...
US Patent 10,831,507, 2020
392020
Scalable interconnects for reconfigurable spatial architectures
Y Zhang, A Rucker, M Vilim, R Prabhakar, W Hwang, K Olukotun
Proceedings of the 46th International Symposium on Computer Architecture …, 2019
292019
A study on the impact of compiler optimizations on high-level synthesis
J Cong, B Liu, R Prabhakar, P Zhang
Languages and Compilers for Parallel Computing: 25th International Workshop …, 2013
292013
SambaNova SN10 RDU: Accelerating software 2.0 with dataflow
R Prabhakar, S Jairath
2021 IEEE Hot Chips 33 Symposium (HCS), 1-37, 2021
282021
Capstan: A vector RDA for sparsity
A Rucker, M Vilim, T Zhao, Y Zhang, R Prabhakar, K Olukotun
MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021
272021
Virtualization of a reconfigurable data processor
GF Grohoski, S Jairath, M Luttrell, R Prabhakar, R Sivaramakrishnan, ...
US Patent 10,698,853, 2020
232020
Quiesce reconfigurable data processor
R Prabhakar, MK Shah, P Nataraja, DB Jackson, KH Leung, ...
US Patent 11,055,141, 2021
222021
Towards layout-friendly high-level synthesis
J Cong, B Liu, G Luo, R Prabhakar
Proceedings of the 2012 ACM international symposium on International …, 2012
212012
Configuration unload of a reconfigurable data processor
MK Shah, R Sivaramakrishnan, M Luttrell, DB Jackson, R Prabhakar, ...
US Patent 11,188,497, 2021
192021
Automatic generation of efficient accelerators for reconfigurable hardware. In 2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA)
D Koeplinger, R Prabhakar, Y Zhang, C Delimitrou, C Kozyrakis, ...
Ieee, 115ś127, 2016
192016
Plasticine: A reconfigurable accelerator for parallel patterns
R Prabhakar, Y Zhang, D Koeplinger, M Feldman, T Zhao, S Hadjis, ...
IEEE Micro 38 (3), 20-31, 2018
172018
Compiler flow logic for reconfigurable architectures
DA Koeplinger, R Prabhakar, S Jairath
US Patent 11,080,227, 2021
132021
Compilation and architecture support for customized vector instruction extension
J Cong, MA Ghodrat, M Gill, H Huang, B Liu, R Prabhakar, G Reinman, ...
17th Asia and South Pacific Design Automation Conference, 652-657, 2012
92012
Sambanova sn10 rdu: A 7nm dataflow architecture to accelerate software 2.0
R Prabhakar, S Jairath, JL Shin
2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 350-352, 2022
72022
Efficient Configuration Of A Reconfigurable Data Processor
MK Shah, R Sivaramakrishnan, M Luttrell, DB Jackson, R Prabhakar, ...
US Patent App. 17/093,543, 2021
72021
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